您当前的位置：
首页 >
文章列表页 >
Design of Large Data Cache and High Speed Transmission System Based on FPGA
更新时间：2023-08-25
|

    • Design of Large Data Cache and High Speed Transmission System Based on FPGA

    • Software Guide   Vol. 22, Issue 8, Pages: 156-163(2023)

    • DOI：10.11907/rjdk.222043    

      CLC：

    扫 描 看 全 文

  • HONG Fanglei,XUE Meng,GUO Hanming.Design of Large Data Cache and High Speed Transmission System Based on FPGA[J].Software Guide,2023,22(08):156-163. DOI： 10.11907/rjdk.222043.

  •  
  •  

0

Views

1

下载量

0

CSCD

Alert me when the article has been cited
提交
Tools
Download
Export Citation
Share
Add to favorites
Add to my album

Related Articles

Design of Area Array CCD Spectrum Acquisition System Based on FPGA
Design of InGaAs Image Sensor Spectrum Acquisition Drive System Based on FPGA
Design of Main Control System for Multi-Channel Raman Spectrometer
Design of Frequency Tracking Technology of Ultrasonic Scalpel Based on FPGA
Integration and Practice of Ideological and Political Education in Digital Communication Course under the New Engineering Background

Related Author

No data

Related Institution

School of Optical-Electrical and Computer Engineering, University of Shanghai for Science and Technology
School of Materials and Chemistry, University of Shanghai for Science and Technology
School of Mechanical Engineering, University of Shanghai for Science and Technology
School of Health Sciences and Engineering, University of Shanghai for Science and Technology
School of Information Science and Technology， Beijing Forestry University
0